Processing of an input signal to suppress selected disturbances or to qualify which signal changes are passed to downstream logic.
Also called: digital input filtering; input filter time; pulse qualification; digital input filter.
Where can filtering change a counting signal?
A digital counting signal can be filtered at the sensor output, input module or controller logic. The location determines which signal is qualified and what downstream logic receives. This differs from smoothing a continuous analogue measurement.
Trace the signal before and after the enabled filter, recording its rule and output. A clean controller trace may reflect events already removed by filtering rather than a clean raw sensor signal.
No. One implementation requires a new state to remain continuous for the configured time. Another uses a filter clock and a nominal pulse-width parameter, with a phase-dependent region between certain acceptance and rejection. Check the actual device rule rather than assuming one cutoff across implementations.
Separate rejected events from delayed accepted events and variation in edge timing. A filter can delay transitions or introduce timing variation according to its implementation. These effects remain different even when the interface labels them all filtering or debounce.
Use an independent product reference and record signals before and after filtering, with both transition-direction settings and relevant product intervals. Identify which hardware and external-device delays are excluded from the quoted filter time.
Compare the device’s qualification rule with genuine product pulses as well as unwanted transitions. Record the timing basis and any delays excluded from the specification.